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Recognition and Visualization of Lithography Defects based on Transfer Learning
Authors: Bo Liu, Pengzheng Gao, Libin Zhang et al.
Institution:School of Information, North China University of Technology, Beijing
Keywords:transfer learning;neural network;lithography defects;visualize;Grad-CAM
doi:10.33079/jomm.20030302
Volume 3, Issue 3: 20030302, 2020 | PDF
Research Article
Published: Oct. 5, 2020
Views:74
Abstract: Yield control in the integrated circuit manufacturing process is very important, and defects are one of the main factors affecting chip yield. As the process control becomes more and more critical ...
Current Status of the Integrated Circuit Industry in ChinaEDA Industry Review
Authors: Litho World
Keywords:EDA;China
doi:10.33079/jomm.19020305
Volume 2, Issue 3: 19020305, 2019 | PDF
Research Article
Published: Sept. 29, 2019
Views:1228
Abstract: China's IC industry has been flourishing in recent years, huge market demand together with government investments are the major driving forces for this development. The status and development momen...
A Photolithography Process Design for 5 nm Logic Process Flow
Authors: Qiang Wu, Yanli Li, Yushu Yang et al.
Institution:Shanghai IC R, &, D Center, 497, Gaosi Road, Zhangjiang Hi, -, Tech Park, China
Keywords:5 nm Logic Process;EUV;SADP;self-aligned LELE;RCWA;stochastics;mask 3D scattering
doi:10.33079/jomm.19020408
Volume 2, Issue 4: 19020408, 2019 | PDF
Research Article
Published: Dec. 25, 2019
Views:2269
Abstract: With the introduction of EUV lithography, the photolithographic process in 5 nm logic process can be simplified to use mostly single exposure method. In a typical 5 nm logic process, the contact-po...
Dual Micro-power 150mA Ultra LDO CMOS Regulator with fast startup
Authors: Peng Zheng, Hai-Shi Wang
Institution:Chengdu University of Information Technology, Chengdu
Keywords:low dropout regulator (LDO);dual micro-power;ultra
doi:10.33079/jomm.19020402
Volume 2, Issue 4: 19020402, 2019 | PDF
Research Article
Published: Dec. 25, 2019
Views:954
Abstract: This paper presents a dual micro-power 150mA ultra LDO CMOS regulator, which is designed for high performance and small size portable wireless devices. The proposed LDO has been designed and simula...
Hard IP Core Nondestructive Testing Technology
Authors: Kun Yu, Hua Wang
Institution:Sino IC Technology Co, ., Ltd, ., Shanghai
Keywords:hard IP core;system on chip (SOC);testing technology;evaluation circuit;memory;automatic test equipment (ATE)
doi:10.33079/jomm.19020201
Volume 2, Issue 2: 19020201, 2019 | PDF
Research Article
Published: June 10, 2019
Views:898
Abstract: Based on the analysis of the existing hard IP core testing technology, the hard IP core nondestructive testing technology was studied, according to the verification requirements of a large number o...